In data-processing systems, for example in computer and microprocessor systems, control units, or peripheral units as well as other information-processing systems, so-called central processing units (CPUs) of a computer, or also merely simple arithmetic logic units (ALUs), are often used for the purpose of calculation and data processing. Corresponding memories such as RAM, ROM, EPROM, EEPROM, etc. are also used to store programs and data. The processor or CPU executes or carries out a program, which as a rule can be made up of various sub-programs that in turn can be dedicated to different tasks (multitasking).
The task that is to be executed by the CPU is decided on ad hoc based on a current scenario, i.e., which tasks are requesting execution at that point in time. It is possible in this context for different tasks to be given different priorities, so that upon execution of the tasks, the respective priority assigned to the tasks is complied with and the highest-priority task is correspondingly processed on a priority basis. This occurs, for example, by way of a so-called interrupt, which corresponds to a brief interruption in a program in order to carry out another higher-priority or time-critical processing operation of another task. In this context, firstly an interrupt request is made, after which an interrupt routine is implemented and the previously processed task is interrupted, and after termination of the interrupt, that task is continued at the interrupt point. This means that as a rule, a current request of a highest-priority task is processed on a priority basis, and a task already being processed is instead interrupted. The relevant interrupt authorizes the CPU to jump into a relevant program segment.
The aforesaid multitasking can also bring about so-called “time sharing,” which appears to serve multiple users simultaneously. In general, “multitasking” refers to a CPU's ability to execute multiple tasks concurrently, the various processes being activated in constant alternation at such short intervals as to create an impression of simultaneity.
Selection of the priorities to be assigned to individual tasks, and the respective execution times of high-priority tasks, can also, however, cause low-priority tasks to be executed infrequently and in some cases not at all. This is the case when aforementioned interrupt queries are arriving almost continuously, so that the execution of a low-priority task cannot be completed. This case forces a respective user to take actions that guarantee a so-called “worst case execution time” (WCET), i.e., a maximum execution time, and thus ensure a minimum CPU execution capacity for each task to be performed. It has been found, however, that such guarantees can be extremely complex, and moreover can limit the performance of the underlying system. In addition, this requires an interrupt controller with a priority controller. An interrupt controller is a functional unit that is responsible for accepting and distributing interrupts.
It would therefore be desirable to provide a capability for utilizing the available execution capacity of a central calculation unit or CPU in such a way as to guarantee, in simple fashion, that each task to be executed, of whatever priority, is executed within a specific time.